Advances in semi-conductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit (IC) devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple hardware threads, multiple cores, multiple devices, and/or complete systems on individual integrated circuits. Additionally, as the density of integrated circuits has grown, the power requirements for computing systems (from embedded systems to servers) have also escalated. Furthermore, software inefficiencies, and its requirements of hardware, have also caused an increase in computing device energy consumption. As a result, there is a vital need for energy efficiency and conservation associated with integrated circuits.
As the trend toward advanced microprocessors with more transistors and higher frequencies continues to grow, computer designers and manufacturers are often faced with corresponding increases in power and thermal consumption. Particularly in computing devices, processor power consumption can lead to overheating, which may negatively affect performance, damage components (e.g., the processor), cause discomfort or injury to the user, and can significantly reduce battery life.
Some processors and SoCs (System-on-a-Chip) are enabled with Intel® Thermal Monitor, which is a feature that activates a Thermal Control Circuit (TCC) to reduce power and maintain die temperatures within product limits. The TCC reduces power by either frequency/voltage reduction or clock modulation (both of which are considered throttling herein). This feature relies on multiple on-die Digital Thermal Sensors (DTS) to monitor real-time die temperatures for TCC activation decisions. Since each DTS cannot be located exactly at a die hotspot, there is an offset between the temperature of the hot spot and the temperature measured by the DTS close to it. This hotspot-to-DTS temperature offset is obtained by thermal modeling and is used to determine the maximum DTS temperature limit that would trigger TCC activation. Currently, the die hotpot-to-DTS temperature offset is calculated by modeling the worst case TDP workload power map and is hardcoded into the throttling algorithm. Consequently, the TCC will be accurately activated only for the workload scenario corresponding to the maximum TDP. For other workloads experienced during product operation by the end user, the offset between the die hot spot temperature and DTS temperature will be different than the one hard coded into the throttling algorithm. This can lead to potential undesirable early/late TCC activation depending on workload, and can impact customer performance (early activation) or possibly exceed maximum temperatures (late activation).
To guarantee the long term reliability of a processor, under fan failure or other anomalous thermal excursion, thermal throttling will kick-in to cool down the temperature of the processor. In one embodiment, the throttling circuit is activated depending upon the temperature recorded by the sensors (DTS) present at various locations on the chip. The maximum allowed temperature that any DTS can reach before a throttling controller (e.g., a throttling circuit) is activated is referred to herein as DTSmax and is calculated using equation (1).DTSmax=Tjmax−Ψjp*TDP   (1)where DTSmax is the maximum temperature that any DTS can read before thermal throttling is activated. In other words, DTSmax operates as customer visible throttling temperature. Ψjp is a measure of thermal resistance between the hot spot on the chip and the DTS. In one embodiment, this is determined by running well-known thermal simulations or experiments. TDP is the maximum power that a chip would see. The drawback of setting the DTSmax limits by this method is that it ignores the effect of the power map. Under actual use conditions, the temperature offset between the hot spot temperature and the DTS temperature is influenced heavily by the way the power is distributed on the chip by the specific workload.